Introduction to Computer Architecture (E C E 552) Syllabus
Course Learning Outcomes
Course Learning Outcome
Students will be able to use standard performance metrics to compare performance of different digital systems
Students will be able to design a pipelined data path for a RISC (reduced instruction set computer) instruction set and be familiar with concepts of data dependence, pipelined hazards and out of order execution.
Students will be able to design basic data and control cache subsystems and understand basic memory organization
Students will be able to design a pipelined RISC micro-processor system with data cache using computer aided design tool and validate the correctness of the design using logic simulation.
Introduction to Computer Architecture
E C E 552
( 3 Credits )
The design of computer systems and components. Processor design, instruction set design, and addressing; control structures and microprogramming; memory management, caches, and memory hierarchies; and interrupts and I/O structures. E C E 551 or knowledge of Verilog is recommended.
(COMP SCI/E C E 352 and COMP SCI/E C E 354) or graduate or professional standing
Department: ELECTRICAL AND COMPUTER ENGR College: College of Engineering